1. Field of the Invention
This invention relates to multiprocessor arrays and to means therein for isolating the source of errors, analyzing and recovering therefrom and for controlling access to the interconnecting data and address busses thereby.
2. Prior Art
A number of prior art diagnostic routines and architectures exist for multiprocessor arrays. These, however, commonly rely upon a routine run by a central or controlling processor which analyzes signal lines and status registers in each of the interfacing other processors to locate the source of error. While this is effective, it is very time consuming on the main control processor and does not provide a means of recovery when one of the interfacing processors gets hung up or enters a streaming condition in which it does not respond to commands from a controlling processor.